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UST-QXLD-009
  • UST-QXLD-009
UST-QXLD-009


Radar high speed data acquisition system based on fpga+dsp

Asynchronous FIFO and DCM realize EMIF data transmission between ADC and DSP

The sampling rate of the system is 30 MHz, and the sampling accuracy is 12 bits

High resolution ADC chip ad9235

Low distortion differential ADC driver chip ad8138

The DSP chip is TMS320C6201, fixed point, 16bit. The clock is provided by the xc7k160t internal clock manager DCM, and the DSP system clock is 200 MHz



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